Input / output Interface

The computer system’s I/O architecture is its interface to the outside world. This architecture is designed to provide a systematic means of controlling interaction with the outside world and to provide the operating system with the information it needs to manage I/O activity effectively.

There are three principal I/O techniques :


Program Input/Output
Input output occurs under the direct and continuous control of the the program  requesting the I/O operation.

Interrupt driven I/O
A program issues an I/O command and then continues to execute,until is interrupted by the I/O hardware to signal the end of the I/O operation.

Direct memory access
Specialized I/O processor take over control of an I/O operation to move a large block data.

Each modul acts as an interface to the system bus or central switch and control one more peripheral device.
Input/Output module help communication betwen the peripheral and the bus.

Peripherals and the System Bus

There are a wide variety of peripherals each with varying methods of operation
  • Impractical to for the processor to accommodate all
    Data transfer rates are often slower than the processor and/or memory.
  • Impractical to use the high-speed system bus to communicate directly
    Data transfer rates may be faster than that of the processor and/or memory.
  • This mismatch may lead to inefficiencies if improperly managed
    Peripheral often use different data formats and word lengths.



    External Devices

    Human readable     : communicate with the computer user – CRT.
    Machine readable   : communicate with equipment – disk drive or tape drive.
    Communication      : communicate with remote devices – may be human readable or
                                              machine readable.




    The External Device – I/O Module
    Control signals: determine the function that will be performed.
    Data                     : set of bits to be sent of received.
    Status signals   : indicate the state of the device.
    Control logic     : controls the device’s operations.
    Transducer       : converts data from electrical to other forms of energy.
    Buffer                 : temporarily holds data being transferred.

    Keyboard/Monitor

    •  Most common means of computer/user interaction.
    •  Keyboard provides input that is transmitted to the computer.
    •  Monitor displays data provided by the computer.
    •  The character is the basic unit of exchange.
    •  Each character is associated with a 7 or 8 bit code.

    Disk Drive
    • Contains electronics for exchanging data, control, and status signals with an I/O
       module.
    • Contains electronics for controlling the disk read/write mechanism.
    • Fixed-head disk – transducer converts between magnetic patterns on the disk
      surface and bits in the buffer.
    • Moving-head disk – must move the disk arm rapidly across the surface.

    I/O Modules

    Module Functions:
    • Control and timing.
    • CPU communication.
    • Device communication.
    • Data buffering.
    • Error detection.

     I/O control and timing steps
    •      Processor checks I/O module for external device status.
    •      I/O module returns status.
    •      If device ready, processor gives I/O module command to request data transfer.
    •      I/O module gets a unit of data from device.
          Data transferred from the I/O module to the processor.


    CPU communication
    • Command decoding
    I/O module accepts commands from the processor sent as signal on the
    control bus.
    • Data
    data exchanged between the processor and I/O module over the data bus.
    • Status reporting
    common status signals BUSY and READY are used because peripherals are slow.
    • Address recognition
    I/O module must recognize a unique address for each peripheral that it controls.

    Device communication: commands, status information, and data.

    Data buffering: data comes from main memory in rapid burst and must be buffered by the
                               I/O module and then sent to the device at the device’s rate.

    Error detection: responsible for reporting errors to the processor.

    Input /Output Diagram
    • Module connects to the computer through a set of signal lines – system
      bus.
    • Data transferred to and from the module are buffered with data registers.
    • Status provided through status registers – may also act as control
      registers.
    • Module logic interacts with processor via a set of control signal lines.
    • Processor uses control signal lines to issue commands to the I/O module.
    • Module must recognize and generate addresses for devices it controls.
    • Module contains logic for device interfaces to the devices it controls.
    • I/O module functions allow the processor to view devices is a simple
      minded way.
    • I/O module may hide device details from the processor so the processor
      only functions in terms of simple read and write operations – timing,
      formats,etc.
    • I/O module may leave much of the work of controlling a device visible to
      the processor – rewind a tape, etc…

    I/O channel or I/O processor
    • I/O module that takes on most of the detailed processing burden.
    • Used on mainframe computers.

    I/O controller of device controller
    • Primitive I/O module that requires detailed control.
    • Used on microcomputers.

    I/O Instructions
     Processor views I/O operations in a similar manner as memory operations.
     Each device is given a unique identifier or address.
     Processor issues commands containing device address – I/O module must check
      address lines to see if the command is for itself.

    I/O mapping

    ®   Memory-mapped I/O
     Single address space for both memory and I/O devices (disadvantage – uses up
       valuable memory address space).
     I/O module registers treated as memory addresses.
     Same machine instructions used to access both memory and I/O devices
      advantage – allows for more efficient programming
     Single read line and single write lines needed.
     Commonly used.
    ®   Isolated I/O
     Separate address space for both memory and I/O devices
    • Separate memory and I/O select lines needed
     Small number of I/O instructions
     Commonly used
    I/O techniques

    Programmed I/O
    ®   Processor executes an I/O instruction by issuing command to appropriate I/O module.
    ®   I/O module performs the requested action and then sets the appropriate bits in the I/O
          status register – I/O module takes no further action to alert the processor – it does not
          interrupt the processor.
    ®  The processor periodically checks the status of the I/O module until it determines that the
          operation is complete.

    Interrupt-Driven I/O
    ®   Overcomes the processor having to wait long periods of time for I/O modules.
    ®   The processor does not have to repeatedly check the I/O module status.
    ®   I/O module view point
          I/O module receives a READ command form the processor.
          I/O module reads data from desired peripheral into data register.
          I/O module interrupts the processor.
          I/O module waits until data is requested by the processor.
          I/O module places data on the data bus when requested.
    ®   Processor view point
          The processor checks for interrupts at the end of the instruction cycle.
          The processor saves the current context when interrupted
            by the I/O module.
          The processor read the data from the I/O module and stores it in memory.
          The processor the restores the saved context and resumes execution.

    Direct Memory Access (DMA)

    Drawback of Programmed and Interrupt-Driven I/O
    • I/O transfer rate limited to speed that processor can test and service devices.
    • Processor tied up managing I/O transfers.

    DMA Function
    • DMA module on system bus used to mimic the processor.
    • DMA module only uses system bus when processor does not need it.
    • DMA module may temporarily force processor to suspend operations – cycle stealing.

    DMA Operation
    • The processor issues a command to DMA module
    ®   Read or write.
    ®   I/O device address using data lines.
    ®   Starting memory address using data lines – stored in address register.
    ®  Number of words to be transferred using data lines – stored in
         data register.

    • The processor then continues with other work.
    • DMA module transfers the entire block of data – one word at a time – directly to or from
      memory without going through the processor.
    • DMA module sends an interrupt to the processor when complete.

    DMA configuration

          Single bus – detached DMA module.
          Each transfer uses bus twice – I/O to DMA, DMA to memory.
          Processor suspended twice.

          Single bus – integrated DMA module.
          Module may support more than one device.
          Each transfer uses bus once – DMA to memory.
          Processor suspended once.



          Separate I/O bus.
          Bus supports all DMA enabled devices.
          Each transfer uses bus once – DMA to memory.
                      •      Processor suspended once.

    I/O Commands



    The processor issues an address, specifying I/O module and device, and an I/O
    command. The commands are:
    ®   Control: activate a peripheral and tell it what to do.
    ®   Test: test various status conditions associated with an I/O module and its
    ®   peripherals.
    ®   Read: causes the I/O module to obtain an item of data from the peripheral and
    ®   place it into an internal register.
    ®   Write: causes the I/O module to take a unit of data from the data bus and.
    ®   transmit it to the peripheral.

    Design Issues
    How does the processor determine which device issued the interrupt.
    How are multiple interrupts dealt with?
    ®   Multiple interrupt lines – each line may have multiple I/O modules

    ®   Software poll – poll each I/O module
          Separate command line – TESTI/O.
          Processor read status register of I/O module.
          Time consuming.

    ®   Daisy chain
          Hardware poll.
          Common interrupt request line.
          Processor sends interrupt acknowledge.
          Requesting I/O module places a word of data on the data lines – “vector”.
          that uniquely identifies the I/O module – vectored interrupt.

                                          ®   Bus arbitration
                                                                      •      I/O module first gains control of the bus.
                                                                      •      I/O module sends interrupt request.
                                                                      •      The processor acknowledges the interrupt
                                                                              request.
                                                                      •      I/O module places its vector of the data lines.


    The Evolution of the I/O Function
    1.   Processor directly controls peripheral device.
    2.   Addition of a controller or I/O module – programmed I/O.
    3.   Same as 2 – interrupts added.
    4.   I/O module direct access to memory using DMA.
    5.   I/O module enhanced to become processor like – I/O channel.
    6.   I/O module has local memory of its own – computer like – I/O processor.